{"@context":"https://neupai.io/schema/v0.2","@type":"StructuredNewsArticle","identity":{"article_id":"skhynix_20260824_hybrid-bonding-tech-note","canonical_url":"https://news.skhynix.co.kr/tech-note-series-ep2/","ai_url":null,"publisher":{"name":"SK하이닉스 뉴스룸","domain":"skhynix.co.kr","type":"online"},"author":"주승환","published_at":"2026-08-24T23:59:58.000Z","updated_at":null,"language":"en","article_type":"feature","originality":"self_produced"},"content":{"headline":"[Tech Note] Evolution into a ‘Fundamental Technology for Improving Semiconductor Performance,’ Hybrid Bonding","summary":"Professor Ju Seung-hwan of Inha University analyzed the principles of hybrid bonding, a next-generation semiconductor packaging technology, and its prospects for application in HBM. Hybrid bonding is expected to significantly improve speed and heat dissipation performance compared to existing TCB, positioning it as a core technology for the AI era.","topics":["semiconductors","hybrid bonding","HBM","AI","packaging"],"geography":["KR","US","JP","CN"],"entities":[{"name":"SK Hynix","canonical_id":"corp:kr:sk-hynix","type":"company","role_in_article":"primary_subject","metadata":{"ticker":"000660.KS","parent":null}},{"name":"Ju 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University","canonical_id":"org:kr:inha-university","type":"organization","role_in_article":"source","metadata":{"ticker":null,"parent":null}}],"claims":[{"id":"c1","statement":"Solder bumps are around 100㎛ and micro bumps are around 20㎛, whereas in Cu–Cu hybrid bonding, the pitch shrinks to about 1㎛ or less","as_of":"2026-08","as_of_explicit":false,"as_of_raw":"August 2026","source_type":"research_paper","comparison":null,"type":"fact","figures":{"value":1,"unit":"um","approximate":true,"converted":null},"expiry_hint":null,"insight":null},{"id":"c2","statement":"Hybrid bonding was commercialized after being applied to Sony's CIS camera devices in 2010","as_of":"2010","as_of_explicit":true,"as_of_raw":"back in 2010","source_type":"media_report","comparison":null,"type":"fact","figures":null,"expiry_hint":null,"insight":null},{"id":"c3","statement":"In 2019, YMTC utilized hybrid bonding in flash memory manufacturing","as_of":"2019","as_of_explicit":true,"as_of_raw":"in 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HBM4","source_type":"industry_estimate","comparison":"previous_generation_hbm3e","type":"fact","figures":{"value":775,"unit":"um","approximate":false,"converted":null},"expiry_hint":null,"insight":null},{"id":"c11","statement":"When applied to HBM, hybrid bonding incurs 2-3 times higher process costs compared to flip chip","as_of":"2026-08","as_of_explicit":false,"as_of_raw":"August 2026","source_type":"research_paper","comparison":"flip_chip","type":"fact","figures":{"value":2.5,"unit":"x","approximate":true,"converted":null},"expiry_hint":null,"insight":null},{"id":"c12","statement":"The precision at Inha University's laboratory currently stands at 100㎚, but equipment capable of 50㎚ and 25㎚ levels, applicable to both HBM and logic, is planned for future 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